1. Field of the Invention
The present invention relates to a digital signal time difference correcting circuit for use with digital interface circuits for transmitting and receiving a plurality of digital signals.
2. Description of the Prior Art
Prior art digital interface circuits in typical tape recorders perform signal processing on two channels using a single cable. Where the number of channels increases to four, eight, 32 and so on, a plurality of cables need to be used correspondingly. One disadvantage of this prior art setup is as follows: If the cables are different in length or if the cables have the same length but include data processing circuits or the like therein, signals having the identical time sequence may be changed in phase depending on the length of the cables or time delays of the data processing circuits (i.e., occurrence of time difference). In such a case, the signals cannot be transferred practically over the cables.
The trouble is that there has been no solution to the above impediment so far.